EP20K600CF672C-7ES vs EP20K600CF672C7ES Comparación
Comparación detallada lado a lado de EP20K600CF672C-7ES por Altera y EP20K600CF672C7ES por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EP20K600CF672C7ES - APEX 20KC FPGA 600K Gates 672-FBGA | Altera
EP20K600CF672C7ES ⚠ Última compraComparación de especificaciones
| Parámetro | EP20K600CF672C-7ES | EP20K600CF672C7ES |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $2.050,00 | $360,00 |
| Family | APEX 20KC | APEX 20K |
| Device Type | Field Programmable Gate Array (FPGA) | — |
| Maximum System Gates | 1,560,000 (typical 600K application gates) | — |
| Typical Logic Elements | 24,320 (per APEX 20KC 600K family) | — |
| Maximum User I/O | 488 | 504 |
| Total I/O Lines | 504 (per Microchip USA listing) | — |
| Total Inputs | 508 | — |
| Embedded System Blocks (ESBs) | 248 | — |
| Embedded RAM | 248 Kbits (dual-port) | — |
| PLLs | 4 | — |
| Propagation Delay | 1.48 ns to 1.6 ns | 1.6 ns |
| Frecuencia de reloj máxima | 1666.6 MHz | — |
| Speed Grade | -7 | — |
| Process Technology | 0.15 micron all-layer copper CMOS | 0.15 µm CMOS |
| Encapsulado | 672-ball FCBGA (FineLine BGA), 45 x 45 mm, 1.27 mm pitch | — |
| Temperatura de funcionamiento | 0 C to 85 C (Commercial) | [DATA_NEEDED: operating temperature grade] |
| Core Voltage | 1.8 V (typical APEX 20KC, exact value per datasheet) | — |
| Configuration Mode | EPC serial / JTAG IEEE 1149.1 | — |
| Compliance | RoHS status unknown (verify with manufacturer datasheet) | — |
| Series | — | APEX 20KC |
| Logic Elements / Cells | — | 24320 |
| System Gates | — | 600000 |
| Maximum Input Lines | — | 508 |
| Number of Macrocells | — | 504 |
| Maximum Operating Frequency | — | 375.94 MHz (per FPGAkey listing) |
| Internal Reference Clock | — | 1666.6 MHz |
| Core Supply Voltage (VCCINT) | — | 1.8 V |
| Package Type | — | FC-FBGA |
| Pin / Ball Count | — | 672 |
| Grade Suffix | — | ES (engineering sample / extended screening) |
| Tipo de montaje | — | Surface Mount (BGA) |
| Nivel MSL | — | [DATA_NEEDED: MSL rating] |
| Estado RoHS | — | [DATA_NEEDED: RoHS compliance] |
| Configuration Memory | — | SRAM-based (volatile) |