EP20K600CF672C6 vs EP20K600CF672C7 Comparación
Comparación detallada lado a lado de EP20K600CF672C6 por Altera y EP20K600CF672C7 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K600CF672C6 | EP20K600CF672C7 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $480,00 | $2.267,89 |
| Family | APEX 20KC | APEX-20KC |
| Typical Gate Count | 600,000 gates | — |
| Logic Elements (LEs) | 24,320 | — |
| Embedded System Blocks (ESBs) | 160 (each 2,048 bits) | — |
| Maximum Embedded RAM | 311,296 bits (311 kbit) | — |
| Maximum User I/O Pins | 508 | — |
| Encapsulado | 672-ball FineLine BGA (CF672) | 672-ball FC-FBGA (27x27 mm) |
| Package Body Size | 27 mm × 27 mm | — |
| Speed Grade | -6 (C6) | C7 |
| Temperatura de funcionamiento | 0 °C to +85 °C (commercial) | 0C to 85C (commercial) |
| Core Voltage | 1.8 V | — |
| I/O Standards Supported | LVCMOS, LVTTL, HSTL, SSTL, GTL+ | — |
| Embedded PLLs | 4 | — |
| Process Technology | 0.18 µm CMOS, 6 metal layers | 0.15 um CMOS, all-layer copper |
| Configuration Method | SRAM-based, JTAG, EPC16/EPC2 | — |
| Estado RoHS | Non-RoHS (legacy process) | Compliant |
| Device Type | — | SPLD / FPGA |
| System Gates | — | 600,000 |
| Logic Cells | — | 24,320 |
| User I/O | — | 508 |
| Ball Pitch | — | 1.27 mm |
| Core Voltage (VCCINT) | — | 1.71 V to 1.89 V |
| Propagation Delay (typ.) | — | 1.48 ns |
| Embedded Memory | — | Dual-port RAM via ESBs |
| CAM Support | — | Yes (ESB-based content-addressable memory) |
| Tipo de montaje | — | Surface Mount |