EP20K60EFC144-1 vs EP20K60EFC144-2X Comparación
Comparación detallada lado a lado de EP20K60EFC144-1 por Altera y EP20K60EFC144-2X por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K60EFC144-1 | EP20K60EFC144-2X |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $19,40 | $42,65 |
| Device Family | APEX 20KE | — |
| Series | APEX 20K | — |
| Logic Family | CMOS | — |
| Typical Gates | 60,000 | 60,000 |
| Maximum System Gates | 256,000 | — |
| Macrocells | 256 | — |
| Maximum User I/Os | 93 (per datasheet; 196 max in 144-FBGA family datasheet) | — |
| Embedded Memory | 32,768 bits (2560 RAM blocks) | — |
| Maximum Internal Frequency | 160 MHz | — |
| Propagation Delay | 1.72 ns | — |
| Core Supply Voltage | 1.8 V | — |
| Speed Grade | -1 | -2 (faster commercial) |
| Temperatura de funcionamiento | 0 C to 85 C (Commercial) | 0 °C to +85 °C (commercial) |
| Encapsulado | 144-FBGA (Fine-pitch BGA) | 144-pin FBGA (13x13 mm) |
| Package Pin Count | 144 balls | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Estado RoHS | [DATA_NEEDED: rohs_status] | Unknown (legacy part - check distributor) |
| Programming Interface | JTAG / ByteBlaster / Altera Programming Unit | — |
| Family | — | APEX-20KE |
| Logic Elements | — | 2,560 |
| Embedded RAM Bits | — | 32,768 |
| User I/Os | — | 93 |
| Number of PLLs | — | 4 |
| Process Technology | — | 0.22 µm CMOS |
| Core Voltage | — | 1.8 V (1.71 V – 1.89 V) |
| Configuration | — | SRAM-based, JTAG (IEEE 1149.1) |
| Tool Support | — | Quartus II, MAX+PLUS II |