EP20K60EFC144-2 vs EP20K30EFC144-1 Comparación
Comparación detallada lado a lado de EP20K60EFC144-2 por Altera y EP20K30EFC144-1 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K60EFC144-2 | EP20K30EFC144-1 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $12,75 | $51,40 |
| Series | APEX-20K | APEX-20K |
| Family | APEX-20KE (Enhanced, 1.8 V core) | APEX-20K MultiCore |
| Typical Gates | 60,000 | 30000 |
| Logic Elements | 2,560 | — |
| Total RAM Bits | 32,768 | 24576 |
| User I/O | 92 to 93 | — |
| Core Supply Voltage | 1.71 V to 1.89 V | — |
| Internal Frequency (max) | 160 MHz | 160 MHz |
| Propagation Delay | 1.72 ns | 1.68 ns |
| Process Technology | 0.18 µm CMOS | 0.22 µm CMOS |
| Encapsulado | 144-LQFP (also referenced as 144-FBGA 13x13 in some sources) | 144-LQFP (20x20 mm) |
| Temperatura de funcionamiento | 0 °C to +85 °C (commercial) | 0°C to 85°C |
| Tipo de montaje | Surface Mount | Surface Mount |
| JTAG Support | IEEE 1149.1 boundary scan | — |
| I/O Standards | LVTTL, LVCMOS, PCI, GTL+ | — |
| Configuration Method | Serial/Parallel passive, JTAG, EPC companion | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Logic Elements / Cells | — | 1200 |
| Number of LABs/CLBs | — | 120 |
| Number of I/O | — | 92 |
| Number of Macros | — | 192 |
| Supply Voltage (VCCINT) | — | 1.71 V to 1.89 V |
| Speed Grade | — | -1 (slowest commercial) |