EP20K60EFC144-2XN vs EP20K60ETC144-2N Comparación
Comparación detallada lado a lado de EP20K60EFC144-2XN por Altera y EP20K60ETC144-2N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EP20K60EFC144-2XN - APEX-20KE FPGA 60K Gates 93 I/O 144-BGA | Intel/Altera
EP20K60EFC144-2XN Nrnd
Comparación de especificaciones
| Parámetro | EP20K60EFC144-2XN | EP20K60ETC144-2N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $152,00 | $65,00 |
| Series | APEX-20KE | — |
| Family | APEX-20K (MultiCore Architecture) | APEX-20KE |
| Typical Gate Count | 60,000 gates | — |
| Logic Elements / Embedded Array Blocks | 2,560 | — |
| Embedded Memory (Bits) | 32,768 | — |
| Maximum User I/O | 93 | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Core Supply Voltage (VCCINT) | 1.71 V to 1.89 V | — |
| I/O Supply Voltage (VCCIO) | [DATA_NEEDED: VCCIO range] | — |
| Package Type | 144-BGA (Fine-pitch Ball Grid Array) | — |
| Package Code (per MPN suffix) | FBGA / LBGA, 13x13 mm | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Operating Temperature (TJ) | 0 C to +85 C (commercial) | — |
| Speed Grade | -2 (per MPN suffix) | -2 |
| Configuration Method | JTAG (IEEE 1149.1), Passive Serial, Parallel | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Logic Family | CMOS, SRAM-based LUT | CMOS |
| Logic Elements | — | 2,560 |
| Typical Gates | — | 60,000 |
| Embedded Memory (ESB) | — | 32,768 bits (32 Kbits) |
| User I/Os | — | 92 |
| Core Voltage (VCCINT) | — | 1.71 V to 1.89 V (1.8 V nominal) |
| Internal Frequency (max) | — | 160 MHz |
| Propagation Delay | — | 1.72 ns |
| Process Technology | — | 0.22 µm CMOS |
| Encapsulado | — | 144-pin TQFP (20 × 20 mm, 0.5 mm pitch) |
| Temperatura de funcionamiento | — | 0 °C to 85 °C (commercial) |
| JTAG Support | — | IEEE 1149.1 boundary-scan |