EP20K60EFC324-1X vs EP20K60EFC324-2X Comparación
Comparación detallada lado a lado de EP20K60EFC324-1X por Altera y EP20K60EFC324-2X por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K60EFC324-1X | EP20K60EFC324-2X |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $198,00 | $195,50 |
| Series | APEX 20KE | — |
| Family | APEX 20K | APEX-20KE |
| Number of Logic Elements / Cells | 2,560 | — |
| Total Gates | 60,000 (162,000 max system gates) | — |
| Total RAM Bits | 32,768 | 32,768 |
| Number of I/O | 196 | — |
| Number of LABs / CLBs | 2,560 | — |
| Number of Embedded System Blocks (ESBs) | 16 | 16 |
| Number of PLLs | 4 | 4 |
| Voltage - Supply (VCCINT) | 1.71 V to 1.89 V (1.8 V nominal) | — |
| Temperatura de funcionamiento | 0 °C to 85 °C (TJ) | — |
| Internal Frequency (max) | 250 MHz | — |
| Propagation Delay | 1.72 ns | — |
| Process Technology | 0.22 µm CMOS, 5-metal | — |
| Supplier Device Package | 324-FBGA (19x19 mm, 1.0 mm pitch) | — |
| Tipo de montaje | Surface Mount | — |
| Speed Grade | -1 | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| Programming Mode | In-system via JTAG / Passive Serial / Passive Parallel | — |
| Number of Logic Elements (LEs) | — | 2,560 |
| Typical Gates | — | 60,000 |
| Number of I/O Pins | — | 196 |
| Core Voltage | — | 1.71 V to 1.89 V |
| MultiVolt I/O Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Package Type | — | 324-FBGA (Fine-pitch BGA) |
| Package Dimensions | — | 19 mm × 19 mm |
| Operating Temperature Grade | — | Industrial (per -2 speed suffix) |
| Configuration Mode | — | Passive Serial / Passive Parallel (Async & Sync) |
| In-System Programming | — | Yes (IEEE 1149.1 JTAG) |