EP20K60ETC144-2N vs EP20K60EFC144-1 Comparación
Comparación detallada lado a lado de EP20K60ETC144-2N por Intel y EP20K60EFC144-1 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K60ETC144-2N | EP20K60EFC144-1 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $65,00 | $19,40 |
| Family | APEX-20KE | — |
| Logic Elements | 2,560 | — |
| Typical Gates | 60,000 | 60,000 |
| Embedded Memory (ESB) | 32,768 bits (32 Kbits) | — |
| User I/Os | 92 | — |
| Core Voltage (VCCINT) | 1.71 V to 1.89 V (1.8 V nominal) | — |
| Speed Grade | -2 | -1 |
| Internal Frequency (max) | 160 MHz | — |
| Propagation Delay | 1.72 ns | 1.72 ns |
| Process Technology | 0.22 µm CMOS | — |
| Encapsulado | 144-pin TQFP (20 × 20 mm, 0.5 mm pitch) | 144-FBGA (Fine-pitch BGA) |
| Temperatura de funcionamiento | 0 °C to 85 °C (commercial) | 0 C to 85 C (Commercial) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Logic Family | CMOS | CMOS |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs_status] |
| Device Family | — | APEX 20KE |
| Series | — | APEX 20K |
| Maximum System Gates | — | 256,000 |
| Macrocells | — | 256 |
| Maximum User I/Os | — | 93 (per datasheet; 196 max in 144-FBGA family datasheet) |
| Embedded Memory | — | 32,768 bits (2560 RAM blocks) |
| Maximum Internal Frequency | — | 160 MHz |
| Core Supply Voltage | — | 1.8 V |
| Package Pin Count | — | 144 balls |
| Programming Interface | — | JTAG / ByteBlaster / Altera Programming Unit |