EP2A25F672C9 vs EP2A25F672I-7 Comparación
Comparación detallada lado a lado de EP2A25F672C9 por Altera y EP2A25F672I-7 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP2A25F672C9 | EP2A25F672I-7 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $700,00 | $171,00 |
| Family | APEX II | APEX II |
| Logic Elements (LE) | Approximately 25,000 | — |
| Macro Cells | 2432 | — |
| User I/O | 492 | — |
| Encapsulado | 672-ball FCBGA (FineLine BGA) | 672-pin FC-FBGA |
| Package Dimensions | 27 mm x 27 mm | — |
| Ball Pitch | 1.0 mm | — |
| Process Technology | 0.15 µm all-layer copper, up to 8 metal layers | 0.15 um |
| Logic Family | CMOS | — |
| Propagation Delay | 1.69 ns | — |
| Temperatura de funcionamiento | 0°C to 85°C (Commercial) | -40C to +85C (Industrial) |
| Tensión de alimentación | [DATA_NEEDED: core VCC voltage] | — |
| I/O Standards | LVTTL, LVCMOS, PCI, LVDS, HSTL, SSTL (multi-voltage 1.5/1.8/2.5/3.3 V) | — |
| Configuration | Passive Serial, Passive Parallel Synchronous, JTAG | — |
| Embedded Memory | ESBs for dual-port RAM, ROM, FIFO | ESBs (Embedded System Blocks) |
| Tipo de montaje | Surface Mount | Surface Mount (Flip-Chip BGA) |
| Estado RoHS | [DATA_NEEDED] | [DATA_NEEDED: rohs status] |
| Manufacturer | — | Intel (formerly Altera) |
| Device Type | — | FPGA (Field-Programmable Gate Array) |
| System Gates | — | 900K (approximately) |
| Logic Cells / Elements | — | 24,320 |
| Maximum Operating Frequency | — | 500 MHz |
| Core Voltage | — | 1.5 V |
| Speed Grade | — | -7 |
| Temperature Grade | — | Industrial (I) |
| Configuration Method | — | JTAG, Passive Serial, Active Serial |
| JTAG Support | — | IEEE 1149.1 Boundary Scan |
| Nivel MSL | — | [DATA_NEEDED: MSL level] |