EP2A40B652C9 vs EP2A40B652C8 Comparación
Comparación detallada lado a lado de EP2A40B652C9 por Intel y EP2A40B652C8 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP2A40B652C9 | EP2A40B652C8 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $92,40 | $94,30 |
| Family | APEX II | APEX 20A |
| Maximum System Gates | 1.5 M (40K logic elements) | — |
| Logic Elements | 40,160 | 40,960 |
| Embedded System Blocks | Yes (dual-port RAM, ROM, CAM) | Configurable as dual-port RAM or CAM |
| Maximum User I/O Pins | [DATA_NEEDED: user I/O count] | — |
| Encapsulado | 652-pin BGA | 652-ball FineLine BGA |
| Process Technology | 0.18 µm CMOS | 0.18 micrometer CMOS SRAM |
| Core Voltage | 1.5 V | 1.8 V |
| Supply Voltage (I/O) | 3.3 V (multi-standard I/O supported) | — |
| Temperatura de funcionamiento | -40C to +85C (industrial, C9 suffix) | 0C to +85C (Commercial, C8 suffix) |
| Configuration Method | SRAM-based, serial/parallel, JTAG IEEE 1149.1 | Serial (PS) or Passive Parallel Async (PPA), JTAG |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, GTL+, SSTL, LVDS | — |
| PLL Count | [DATA_NEEDED: PLL count] | — |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount |
| Nivel MSL | 3 (168 hours floor life) | — |
| Estado RoHS | unknown | [DATA_NEEDED: RoHS compliance status] |
| Device | — | EP2A40 |
| Maximum User I/O | — | 718 |
| Embedded Memory (bits) | — | 425,984 |
| I/O Voltage | — | 3.3 V (LVTTL/LVCMOS) |
| Speed Grade | — | C8 |