EP2A40B724I-9 vs EP2A40B724I-8 Comparación
Comparación detallada lado a lado de EP2A40B724I-9 por Altera y EP2A40B724I-8 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP2A40B724I-9 | EP2A40B724I-8 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $605,00 | $280,00 |
| Family | APEX II | APEX II |
| Logic Elements | 40,000 (typical) | — |
| Logic Cells | 38400 | — |
| Embedded Memory Bits | 655360 | — |
| Maximum User I/O | 540 (per EP2A40B724 family) | 540 |
| Encapsulado | 724-ball FCBGA / FineLine BGA | 724-ball FineLine BGA |
| Package Code | B724 | HBGA / S-PBGA-B724 |
| Temperature Grade | Industrial ('I' suffix) | — |
| Temperatura de unión de funcionamiento | -40 C to +100 C (industrial) | — |
| Speed Grade | -9 (per APEX II speed bin) | -8 |
| Peak Reflow Temperature | 220 C | — |
| Core Voltage | 1.5 V (typical APEX II) | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, SSTL | — |
| Configuration Interface | JTAG, Passive Serial | — |
| PLL | On-chip (per APEX II architecture) | — |
| Estado RoHS | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS status] |
| Nivel MSL | [DATA_NEEDED: msl level] | — |
| Logic Elements (LEs) | — | 38,400 |
| Logic Array Blocks (LABs) | — | 3,840 |
| Embedded System RAM | — | 655,360 bits (655 Kbits) |
| Temperatura de funcionamiento | — | -40C to +100C (Industrial) |
| Core Supply Voltage | — | 1.5 V (1.425 V to 1.575 V) |
| I/O Banks | — | [DATA_NEEDED: I/O bank count] |
| PLLs | — | 4 |
| Tipo de montaje | — | Surface Mount |
| Configuration Mode | — | JTAG / passive serial / passive parallel |
| Process Node | — | [DATA_NEEDED: process technology] |