EP2A40F780 vs EP2A40F672C6 Comparación
Comparación detallada lado a lado de EP2A40F780 por Altera y EP2A40F672C6 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP2A40F780 | EP2A40F672C6 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $142,00 | $105,00 |
| Family | APEX II | APEX II |
| Device | EP2A40 | EP2A40 |
| Typical Gates | 1,500,000 | — |
| Logic Elements | 30,000 | — |
| Maximum User I/O Pins | [DATA_NEEDED: maximum user I/O count] | [DATA_NEEDED: max user I/O count] |
| Encapsulado | 780-ball FineLine BGA (FBGA) | 672-ball FineLine BGA (FBGA-672) |
| Tipo de montaje | Surface Mount | Surface Mount (BGA) |
| Temperatura de funcionamiento | [DATA_NEEDED: temperature grade] | Commercial (0C to +85C) |
| Configuration Memory | SRAM-based | SRAM-based |
| Embedded System Blocks (ESBs) | [DATA_NEEDED: ESB count] | [DATA_NEEDED: ESB count] |
| Process Technology | [DATA_NEEDED: process node] | 0.18-micron CMOS |
| JTAG Support | IEEE 1149.1 boundary-scan | Yes (IEEE 1149.1) |
| Programming File Format | .sof/.pof via Quartus II | — |
| Core Voltage | [DATA_NEEDED: VCCINT] | — |
| I/O Voltage | [DATA_NEEDED: VCCIO range] | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Logic Elements (typical) | — | 40,000 |
| Maximum System Gates | — | [DATA_NEEDED: maximum system gates] |
| Speed Grade | — | C6 (commercial) |
| PLL Support | — | Yes |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Lifecycle | — | Obsolete / EOL (per Intel/Altera product discontinuation notice) |