EP2AGX125EF35C5G vs EP2AGX125EF35C4G Comparación
Comparación detallada lado a lado de EP2AGX125EF35C5G por Intel y EP2AGX125EF35C4G por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EP2AGX125EF35C4G - Arria II GX FPGA, 118K LEs, 1152-FCBGA | Intel
EP2AGX125EF35C4G ⚠ Última compraComparación de especificaciones
| Parámetro | EP2AGX125EF35C5G | EP2AGX125EF35C4G |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $0,00 | $1.290,00 |
| Device Type | Field Programmable Gate Array (FPGA) | — |
| FPGA Family | Arria II GX | — |
| Logic Cells | 118143 | — |
| Programmable Bits | 8315904 bits | — |
| I/O Count | 452 I/O | — |
| Encapsulado | 1152-BBGA, FCBGA | 1152-ball FC-FBGA (Flip-Chip) |
| Package Type | FC-FBGA | — |
| Número de pines | 1152 pins | — |
| Tensión de alimentación | 0.9 V | — |
| Listed Performance | 500 MHz | — |
| Terminal Form | BALL | — |
| Terminal Count | 1152 terminals | — |
| Package Code | HBGA | — |
| Tipo de montaje | Surface mount | Surface Mount |
| Packaging | Tray | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Rango de temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | — |
| Configuration Memory | [DATA_NEEDED: configuration memory type] | — |
| Transceiver Count | [DATA_NEEDED: transceiver count] | — |
| Family | — | Arria II GX |
| Logic Elements | — | 118,143 |
| Embedded Memory Bits | — | 8,315,904 |
| Memory Blocks (M9K) | — | [DATA_NEEDED: M9K count] |
| Hardware Multipliers (18x18) | — | 452 |
| DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| Transceiver Channels | — | 12 |
| Maximum Transceiver Data Rate | — | 6.375 Gbps |
| PCI Express Hard IP | — | Gen1/Gen2 x1/x4/x8 |
| Core Voltage | — | 0.9 V |
| User I/O Banks | — | [DATA_NEEDED: I/O bank count] |
| Maximum User I/O | — | [DATA_NEEDED: max user I/O count] |
| Process Technology | — | 40 nm |
| Temperatura de funcionamiento | — | 0C to +85C (Commercial) |
| Configuration Method | — | SRAM-based, PS/FPP/JTAG |
| Speed Grade | — | C4 |
| Lead-Free | — | Yes |