EP2C35U484C7 vs EP2C35U484C8 Comparación
Comparación detallada lado a lado de EP2C35U484C7 por Altera y EP2C35U484C8 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP2C35U484C7 | EP2C35U484C8 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $108,50 | $92,40 |
| Family | Cyclone II | — |
| Logic Elements (LE) | 33,216 | — |
| Total RAM Bits | 483,840 bits | 483,840 bits (33216 cells) |
| User I/O Count | 322 | — |
| Number of Logic Blocks / Logic Cells | 2,076 (per digchip listing) | — |
| Embedded Multipliers (18x18) | 35 | — |
| PLLs | 4 | — |
| Process Technology | 90 nm CMOS | — |
| Core Supply Voltage | 1.2 V | — |
| Temperatura de funcionamiento | 0 C to +85 C (commercial 'C' grade) | 0C to 85C (commercial) |
| Internal Frequency (max) | 402.58 MHz | 500 MHz |
| Logic Family | CMOS | — |
| Encapsulado | 484-FBGA (FineLine BGA, UBGA-484) | — |
| Tipo de montaje | Surface Mount | Surface Mount (BGA) |
| Estado RoHS | Lead-free / Compliant per Altera product page | Compliant (lead-free UBGA) |
| Speed Grade | 7 (fastest commercial for this device) | C8 (commercial, 8th tier) |
| I/O Standards Supported | LVDS, LVTTL, LVCMOS, SSTL, PCI | — |
| PCI Support | PCI 32/64-bit @ 33/66 MHz; PCI-X 133 MHz (with PHY) | — |
| Series | — | Cyclone II |
| Family Name | — | Cyclone II |
| Logic Elements / Cells | — | 33,216 LE |
| Number of I/O | — | 322 user I/O |
| Number of Logic Blocks/Elements | — | 2,076 logic blocks |
| Number of Gates | — | [DATA_NEEDED: equivalent gate count] |
| Number of PLLs | — | 4 |
| Embedded Multipliers | — | 35 (18x18) |
| Package Type | — | 484-FBGA (UBGA-484), lead-free |
| Package Pin Count | — | 484 balls |
| Core Voltage | — | 1.15 V to 1.25 V |
| Logic Family / Process | — | CMOS, 90 nm |
| Configuration Modes | — | JTAG, AS, PS, FPP |
| Nivel MSL | — | 3 (per JEDEC J-STD-020) |
| Estado del ciclo de vida | — | Not Recommended for New Designs (NRND) |