EP2S180F1508C3NAA vs EP2S180F1508C4TT Comparación
Comparación detallada lado a lado de EP2S180F1508C3NAA por Intel y EP2S180F1508C4TT por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EP2S180F1508C3NAA - Stratix II 180K LEs FPGA | Intel | 1508-FBGA
EP2S180F1508C3NAA ⚠ Última compraAltera
EP2S180F1508C4TT - 180K Logic Elements FPGA | Altera | High-Performance Digital Logic
EP2S180F1508C4TT ObsoleteComparación de especificaciones
| Parámetro | EP2S180F1508C3NAA | EP2S180F1508C4TT |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $285,00 | $0,00 |
| Family | Stratix II | — |
| Logic Elements | 179,400 LEs | approximately 180,000 |
| Adaptive Logic Modules (ALMs) | 71,760 ALMs | — |
| Embedded RAM (total) | 9,383,040 bits (M4K + M-RAM) | — |
| M4K RAM Blocks | 930 blocks of 4 Kbits each | — |
| M-RAM Blocks | 9 blocks of 512 Kbits each | — |
| DSP Blocks | 96 blocks (18x18 multipliers) | — |
| 18x18 Embedded Multipliers | 384 | — |
| Transceivers | 12 channels | — |
| Maximum Transceiver Data Rate | 6.375 Gbps | — |
| Maximum User I/O | 1170 user I/O pins | — |
| Encapsulado | 1508-ball FCBGA | 1,508-ball FBGA |
| Process Technology | 90 nm CMOS | — |
| Speed Grade | -3 (commercial, faster) | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature grade] | [DATA_NEEDED: operating temperature] |
| Core Voltage | [DATA_NEEDED: VCCINT nominal] | [DATA_NEEDED: core voltage] |
| Tipo de montaje | Surface Mount | Surface Mount |
| Estado RoHS | unknown | unknown |
| Product Type | — | Field-Programmable Gate Array (FPGA) |
| Device Family | — | Stratix II |
| User I/O | — | 1,170 pins |
| Logic Array Blocks | — | 8,970 LABs |
| Temperature Grade | — | -T |
| Configuration Mechanism | — | [DATA_NEEDED: configuration mechanism] |
| Operating Voltage | — | [DATA_NEEDED: operating voltage] |
| I/O Voltage | — | [DATA_NEEDED: I/O voltage] |
| Storage Temperature | — | [DATA_NEEDED: storage temperature] |
| Package Dimensions | — | [DATA_NEEDED: package dimensions] |
| Ball Pitch | — | [DATA_NEEDED: ball pitch] |
| Typical Power Dissipation | — | [DATA_NEEDED: typical power dissipation] |
| REACH Status | — | unknown |
| AEC-Q100 Qualification | — | unknown |
| Lead-Free Status | — | unknown |
| Halogen-Free Status | — | unknown |