EP2S30F484C3 vs EP2S30F484C4N Comparación
Comparación detallada lado a lado de EP2S30F484C3 por Intel y EP2S30F484C4N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP2S30F484C3 | EP2S30F484C4N |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $620,00 | $480,00 |
| Family | Stratix II | Stratix II |
| Logic Elements | 33,880 | 33,880 |
| LABs / CLBs | 1,694 | — |
| Total RAM Bits | 1,369,728 | 1,369,728 |
| Number of User I/O | 342 | — |
| Number of I/O Pins (Package) | 500 | — |
| Core Voltage | 1.20 V | 1.2 V |
| Operating Temperature (Max) | 85 C (Commercial) | — |
| Speed Grade | C3 | C4 (commercial) |
| Encapsulado | 484-BBGA, FCBGA, 23 x 23 mm, 1.0 mm pitch | 484-ball FC-FBGA |
| Tipo de montaje | Surface Mount | Surface Mount |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Embedded Memory Type | TriMatrix (true dual-port, FIFO) | — |
| Embedded DSP Blocks | Yes | — |
| PLL Count | Multiple (per family datasheet) | — |
| Estado RoHS | [DATA_NEEDED: rohs status] | — |
| Logic Array Blocks (LABs) | — | 1,694 |
| User I/Os | — | 342 |
| Package Pin Count | — | 484 |
| Maximum Internal Frequency | — | 711.24 MHz |
| Temperature Grade | — | Commercial |
| Lead-Free / RoHS | — | [DATA_NEEDED: lead-free / RoHS status] |
| Nivel MSL | — | [DATA_NEEDED: MSL moisture sensitivity level] |