EP2S30F672C4 vs EP2S30F672I4N Comparación
Comparación detallada lado a lado de EP2S30F672C4 por Intel y EP2S30F672I4N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP2S30F672C4 | EP2S30F672I4N |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $498,43 | $145,00 |
| Manufacturer | Intel (formerly Altera) | — |
| Series | Stratix II | — |
| Logic Elements / Cells | 33,880 | — |
| Total RAM Bits | 1,369,728 | 1,369,728 |
| Number of I/O | 500 | — |
| Encapsulado | 672-BBGA, FCBGA (27x27 mm) | 672-BBGA, FCBGA (27x27 mm) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Core Voltage - Supply | 1.15 V to 1.25 V | — |
| Process Technology | 90 nm | — |
| Maximum Core Frequency (datasheet benchmark) | 711 MHz | — |
| Temperatura de funcionamiento | 0C to +85C (commercial, 'C' speed grade) | -40C to +100C (industrial) |
| Embedded DSP Blocks | 16 (Stratix II S30 tier) | — |
| Number of PLLs | [DATA_NEEDED: PLL count for S30 tier] | — |
| Number of Global Clock Networks | [DATA_NEEDED: global clock network count] | — |
| Estado RoHS | Compliant | Compliant |
| Lead-Free | Yes | — |
| Family | — | Stratix II |
| Logic Elements (LEs) | — | 33,880 |
| Logic Array Blocks (LABs) | — | 1,694 |
| Maximum User I/Os | — | 500 |
| Core Supply Voltage | — | 1.15 V to 1.25 V |
| Technology Node | — | 90 nm |
| Speed Grade | — | I4 (speed grade 4, industrial) |
| Tensión de alimentación | — | 1.15 V to 1.25 V |
| Maximum Frequency | — | 711.24 MHz |
| Nivel MSL | — | 3 (per JEDEC J-STD-020) |