EP2S60F484I4 vs EP2S60F484I5N Comparación

Comparación detallada lado a lado de EP2S60F484I4 por Intel y EP2S60F484I5N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.

Comparación de especificaciones

Parámetro EP2S60F484I4 EP2S60F484I5N
Marca Intel Altera
Categoría FPGA & CPLD FPGA & CPLD
Estado del ciclo de vida Obsolete Obsolete
Estado del stock In Stock In Stock
Precio unitario (USD) $138,40 $1.325,00
Series Stratix II Stratix II (EP2S60)
Manufacturer Intel (formerly Altera) —
Family Stratix II FPGA Field Programmable Gate Array (FPGA)
Logic Elements (LE) 60,440 60,440
Adaptive Logic Modules (ALM) [DATA_NEEDED: ALM count] 24,176
Embedded Memory Bits 2,544,192 bits (~317 KB) —
Total RAM Blocks [DATA_NEEDED: total RAM blocks] —
User I/O Pins 334 —
User I/O Banks [DATA_NEEDED: I/O bank count] —
High-Speed Transceivers 12 channels —
Transceiver Data Rate [DATA_NEEDED: max Gbps] —
PLLs 4 12 (4 enhanced + 8 fast)
DSP Blocks [DATA_NEEDED: DSP block count] —
Core Voltage 1.2 V —
Process Technology 90 nm CMOS 90 nm CMOS
Rango de temperatura de funcionamiento -40 °C to +100 °C (Industrial, I4) -40 °C to +100 °C (industrial)
Speed Grade I4 (industrial, fastest speed bin for Stratix II F484) I5 (industrial, slow-speed for low power)
Encapsulado 484-ball FBGA (F484) 484-ball FC-FBGA (Flip-Chip Fine-pitch BGA), 1.00 mm pitch
Ball Pitch [DATA_NEEDED: ball pitch in mm] —
Tipo de montaje Surface Mount Surface Mount (BGA)
Lead-Free / RoHS Contains Lead; RoHS Non-Compliant (per distributor data) —
Configuration Method SRAM-based, loaded via Quartus II bitstream —
Nivel MSL [DATA_NEEDED: MSL rating] —
Embedded Memory (bits) — 2,544,192
Embedded Memory (M512/M4K/M-RAM blocks) — M512: 330, M4K: 255, M-RAM: 2
DSP Blocks (18-bit multipliers) — 48 blocks (192 18x18 multipliers)
Maximum User I/O Pins — 334
Maximum Fabric Clock — 609.76 MHz
Core Supply Voltage — 1.2 V typical
Estado RoHS — [DATA_NEEDED: rohs status not stated in verified data]
Lead-Free / Halogen-Free — [DATA_NEEDED: lead-free / halogen-free status]
Configuration Interface — JTAG (IEEE 1149.1), Passive Serial, Fast Passive Parallel
Design Tool — Quartus II (legacy; current Intel Quartus Prime with Stratix II device support)

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