EP2S60F672C4 vs EP2S60F672C5 Comparación
Comparación detallada lado a lado de EP2S60F672C4 por Altera y EP2S60F672C5 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP2S60F672C4 | EP2S60F672C5 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $1.080,00 | $410,85 |
| Family | Stratix II | Stratix II |
| Logic Elements (LE) | 60440 | — |
| Embedded Memory Bits | 2544192 | — |
| Logic Array Blocks (LAB) | 3022 | — |
| User I/Os | 492 | — |
| Encapsulado | 672-BBGA, FCBGA | 672-ball FC-FBGA (35 × 35 mm, 1 mm pitch) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Temperatura de funcionamiento | 0C to +85C (commercial) | — |
| Speed Grade | C4 | — |
| Process Technology | 90 nm | 90 nm CMOS |
| Core Voltage | 1.2 V (typical) | 1.2 V |
| DSP Blocks | [DATA_NEEDED: DSP block count per Stratix II variant] | 12 (dedicated 18 × 18 multipliers) |
| Estado RoHS | [DATA_NEEDED: not confirmed in provided data] | Non-RoHS (legacy product, pre-RoHS production runs) |
| Lead-Free | [DATA_NEEDED: not confirmed in provided data] | — |
| Nivel MSL | [DATA_NEEDED: not in provided data] | — |
| Device Family | — | Stratix II FPGA |
| Logic Elements | — | 60,440 |
| Configurable Logic Blocks (CLBs) | — | 24,176 |
| Total RAM Bits | — | 2,544,192 bits |
| Maximum User I/Os | — | 492 |
| Operating Frequency | — | Up to 609.76 MHz |
| Operating Temperature Grade | — | Commercial (C5 suffix) |
| Rango de temperatura de funcionamiento | — | 0°C to +85°C |
| Number of PLLs | — | 4 |
| I/O Standards | — | LVDS, LVTTL, SSTL, HSTL, PCI-X |
| Configuration Scheme | — | Fast Passive Parallel, JTAG, Active Serial |