EP2SGX60EF1152C3N vs EP2SGX60EF1152C5 Comparación
Comparación detallada lado a lado de EP2SGX60EF1152C3N por Intel y EP2SGX60EF1152C5 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EP2SGX60EF1152C5 - Stratix II GX FPGA, 60K LE, 1152-FBGA | Intel
EP2SGX60EF1152C5 ⚠ Última compraComparación de especificaciones
| Parámetro | EP2SGX60EF1152C3N | EP2SGX60EF1152C5 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $2.195,00 | $1.380,00 |
| Family | Stratix II GX | — |
| Series | Stratix II | — |
| Logic Elements | 60,440 | 60,440 |
| Adaptive Logic Modules (ALMs) | 30,220 | — |
| Logic Array Blocks (LABs) | 3022 | — |
| Embedded Memory (bits) | 2,544,192 | — |
| Maximum User I/Os | 534 | — |
| Process Technology | 90 nm CMOS | — |
| Core Voltage (Vcc) | 1.2 V | — |
| Maximum Internal Frequency | 717 MHz | — |
| Propagation Delay | 0.40 ns | — |
| Embedded Multipliers (18x18) | [DATA_NEEDED: embedded multiplier count] | — |
| PLLs | 4 | — |
| Transceiver Data Rate | 3.125 Gbps per channel | — |
| Encapsulado | 1152-BBGA (FC-FBGA) 35 x 35 mm, 1.0 mm pitch | — |
| Speed Grade | C3 (commercial, -3 bin) | — |
| Temperatura de funcionamiento | 0C to +85C (commercial) | — |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount |
| Device Family | — | Stratix II GX |
| LABs / CLBs | — | 3,022 |
| Total RAM Bits | — | 2,544,192 |
| Number of I/Os | — | 534 |
| Package Type | — | 1152-FBGA |
| Package Dimensions | — | 35 x 35 mm |
| Core Supply Voltage | — | 1.15 V to 1.25 V |
| Internal Operating Frequency | — | Up to 717 MHz |
| Operating Temperature Grade | — | Commercial (0C to +85C) |
| Estado RoHS | — | [DATA_NEEDED: RoHS compliance status] |
| Nivel MSL | — | [DATA_NEEDED: MSL moisture sensitivity level] |
| User I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Transceivers | — | [DATA_NEEDED: number of integrated transceivers] |