EP3C55F484C8N vs EP3C55F484I8N Comparación
Comparación detallada lado a lado de EP3C55F484C8N por Altera y EP3C55F484I8N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP3C55F484C8N | EP3C55F484I8N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $58,50 | $61,50 |
| Device Family | Cyclone III | — |
| Logic Elements (LE) | 55,856 | 55,856 |
| User I/O Pins | 327 | 327 |
| Embedded Memory Bits | 2,396,160 | 2,396,160 bits (approximately 234 Kbytes) |
| Memory Blocks (M9K) | 260 | — |
| Embedded Multipliers (18x18) | 260 | 312 |
| PLLs | 4 | 4 |
| Maximum Internal Frequency | 472 MHz | — |
| Core Voltage (VCCINT) | 1.2 V | 1.2 V nominal (1.15 V to 1.25 V) |
| Encapsulado | 484-BGA (FBGA), 23 x 23 mm, 1.0 mm pitch | 484-ball FBGA (FineLine BGA), 23 mm x 23 mm |
| Package Height | 2.60 mm | — |
| Operating Temperature (Commercial) | 0 C to +85 C | — |
| Process Node | 65 nm TSMC low-power | — |
| Configuration | SRAM-based, JTAG / AS / PS modes | — |
| Lead-Free / RoHS | Yes - lead-free, RoHS compliant | — |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount |
| Series | — | Cyclone III |
| Logic Array Blocks (LAB) | — | 3,491 |
| I/O Banks | — | 8 |
| Auxiliary Voltage (VCCAUX) | — | 2.5 V nominal |
| I/O Voltage (VCCIO) | — | 1.2 V to 3.3 V per bank |
| Temperatura de unión de funcionamiento | — | -40 C to +100 C (industrial, suffix I8) |
| Speed Grade | — | 8 (slowest Cyclone III timing bin) |
| Process Technology | — | 65 nm low-power CMOS |
| Configuration Modes | — | AS, PS, FPP, JTAG |
| Estado RoHS | — | Compliant |
| Lead-Free | — | Yes |
| Nivel MSL | — | 3 |