EP3C5E144C7N vs EP3C5E144A7N Comparación
Comparación detallada lado a lado de EP3C5E144C7N por Intel y EP3C5E144A7N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP3C5E144C7N | EP3C5E144A7N |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $13,17 | $22,80 |
| Device Family | Cyclone III | — |
| Logic Elements (LE) | 5,136 | 5,136 |
| Logic Array Blocks (LAB) | 290 | — |
| Total Memory Bits | 423,936 | 423,936 bits (414 Kbits) |
| Embedded M9K Memory Blocks | 46 | — |
| Embedded 18x18 Multipliers | 46 | 23 |
| PLLs | 4 | — |
| User I/Os | 94 | — |
| Speed Grade | C7 (7 ns delay) | 7 |
| Process Technology | TSMC 65 nm low-power | 65 nm low-k dielectric |
| Encapsulado | 144-LQFP Exposed Pad (EQFP-144), 22x22 mm, 0.5 mm pitch | 144-LQFP Exposed Pad (EQFP, 22x22 mm) |
| Temperatura de unión de funcionamiento | 0C to +85C | — |
| Configuration Modes | AS, PS, FPP, JTAG | AS, PS, JTAG, Fast Passive Parallel |
| I/O Standards | LVDS, SSTL, HSTL, LVCMOS, PCI/PCI-X | — |
| Estado RoHS | Compliant | Compliant (per DigiKey product page) |
| Series | — | Cyclone III |
| Embedded Memory Blocks | — | 46 x M9K (9 Kbit each) |
| User I/O Pins | — | 94 |
| Number of I/O Banks | — | 4 |
| Number of PLLs | — | 4 |
| Core Voltage (VCCINT) | — | 1.2 V |
| I/O Bank Voltage (VCCIO) | — | Per-bank, supports 1.2 V to 3.3 V |
| Temperature Grade | — | Commercial (0C to +85C junction) |
| Design Toolchain | — | Quartus II / Quartus Prime |
| Supported I/O Standards | — | LVDS, SSTL, LVTTL, PCI, LVCMOS |
| Tipo de montaje | — | Surface Mount |