EP3C80U484C6 vs EP3C80F484C6N Comparación
Comparación detallada lado a lado de EP3C80U484C6 por Intel y EP3C80F484C6N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP3C80U484C6 | EP3C80F484C6N |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $52,40 | $369,38 |
| Family | Cyclone III | Cyclone III FPGA (Low Power) |
| Logic Elements | 81,264 | — |
| Total RAM Bits | 2,810,880 | — |
| Number of LABs/CLBs | 5079 | — |
| Number of Logic Elements/Cells | 81264 | — |
| Total Memory Bits | 2810880 | — |
| Number of I/O | 295 | — |
| Number of Gates | Not specified in provided data | — |
| Voltage - Supply | 1.15 V to 3.3 V | — |
| Tipo de montaje | Surface Mount | Surface Mount (SMT) |
| Temperatura de funcionamiento | 0C to +85C (Commercial) | 0C to +85C (Commercial, 'C' speed grade) |
| Encapsulado / Carcasa | 484-FBGA / 484-UBGA | — |
| Supplier Device Package | 484-UBGA (19x19 mm) | — |
| Speed Grade | 6 | 6 (medium speed bin) |
| Number of PLLs | 4 | 4 |
| Number of 18x18 Multipliers | 244 | — |
| Process Technology | 65 nm | 65 nm TSMC low-power CMOS |
| Estado RoHS | Compliant | Compliant (Pb-free) |
| Configuration Interface | JTAG, Passive Serial | — |
| Series | — | Cyclone III |
| Logic Elements (LE) | — | 81,264 |
| Embedded Memory Bits | — | 2,810,880 (4 Mbits) |
| Maximum User I/O | — | 295 |
| Encapsulado | — | 484-ball FBGA (FineLine BGA), 23x23 mm, 1.0 mm pitch |
| Number of Global Clock Networks | — | 20 |
| Embedded 18x18 Multipliers | — | 244 |
| Core Voltage (VCCINT) | — | 1.2 V |
| I/O Voltage (VCCIO) | — | 1.2V / 1.5V / 1.8V / 2.5V / 3.3V (per-bank) |
| Configuration Scheme | — | Active Serial (AS), Passive Serial (PS), JTAG, Fast Passive Parallel (FPP) |