EP3CLS70F484C7 vs EP3C80F484C7 Comparación
Comparación detallada lado a lado de EP3CLS70F484C7 por Altera y EP3C80F484C7 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP3CLS70F484C7 | EP3C80F484C7 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Unknown |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $148,75 | $215,00 |
| Family | Cyclone III LS | Cyclone III |
| Logic Elements | 70,208 LE | — |
| Adaptive Logic Modules (ALMs) | 27,808 ALM | — |
| Embedded Memory | 2.93 Mbit (M9K blocks) | — |
| 18x18 Hardware Multipliers | 278 | — |
| Maximum User I/O | 294 | — |
| PLLs | 4 | — |
| Global Clocks | 20 | — |
| Core Voltage | 1.15 V to 1.25 V | — |
| Temperatura de funcionamiento | 0 C to +70 C (commercial, C7 grade) | — |
| Maximum Internal Frequency | 437.5 MHz | — |
| Process Node | 65 nm TSMC low-power | — |
| Encapsulado | 484-pin FBGA (FineLine BGA) | 484-BGA |
| Tipo de montaje | Surface Mount | Surface Mount |
| Packaging | Tray | — |
| Configuration Modes | JTAG, AS, AP, PS | — |
| Estado RoHS | Compliant | [DATA_NEEDED: RoHS status] |
| Device Type | — | Field Programmable Gate Array (FPGA) |
| Logic Cells | — | 81264 cells |
| Memory | — | 2810880 bit |
| User I/O | — | 295 I/O |
| Logic Array Blocks | — | 5079 LABs |
| Technology | — | 65 nm |
| Stated Frequency | — | 437.5 MHz |
| Tensión de alimentación | — | 1.2 V |
| Recuento de pines | — | 484 pins |
| Configuration | — | FPGA programmable after assembly |
| REACH Status | — | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification] |