EP3SE50F780I3N vs EP3SE50F780C4N Comparación
Comparación detallada lado a lado de EP3SE50F780I3N por Intel y EP3SE50F780C4N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EP3SE50F780I3N - Stratix III E FPGA, 47.5K Logic Elements, 780-FBGA | Intel
EP3SE50F780I3N ⚠ Última compraComparación de especificaciones
| Parámetro | EP3SE50F780I3N | EP3SE50F780C4N |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $1.550,00 | $1.430,00 |
| Manufacturer | Intel (formerly Altera) | — |
| Family | Stratix III E | Stratix III E |
| Logic Elements | 47,500 | — |
| Embedded Memory Bits | 5,760,000 bits | 5,760,000 |
| User I/O Pins | 488 | — |
| Encapsulado | 780-ball FC-FBGA (Fine-pitch Chip-Scale BGA) | 780-Ball FBGA, 29 mm x 29 mm, 1.0 mm pitch |
| Process Technology | 65 nm | — |
| Core Voltage | 0.9 V | — |
| Operating Temperature Grade | Industrial | — |
| Configuration Interface | JTAG IEEE Std. 1149.1 (BST), Passive Serial, Fast Passive Parallel, Active Serial | — |
| Boundary-Scan Support | Yes (IEEE 1149.1) | — |
| Tipo de montaje | Surface Mount | Surface Mount (BGA) |
| Estado RoHS | Compliant | Lead-free / RoHS compliant |
| Estado del ciclo de vida | Last Time Buy (Stratix III family EOL announced) | — |
| Supply Type | Tray (per JAK Electronics listing) | — |
| Logic Elements (LE) | — | 47,500 |
| Embedded Memory (M9K/M144K blocks) | — | 488 (per family datasheet) |
| Number of LABs | — | 1900 |
| Maximum User I/Os | — | 488 |
| DSP Blocks (18x18 multipliers) | — | 432 |
| PLLs | — | 12 (per family datasheet) |
| Maximum Operating Frequency | — | 717 MHz |
| Transceiver Channels | — | Up to 12 (per family, model-dependent) |
| Transceiver Data Rate | — | Up to 6.375 Gbps (per Stratix III E family) |
| Process Node | — | 40 nm |
| Tensión de alimentación | — | Core 0.9 V, I/O 1.2 V-3.3 V (multi-rail) |
| Temperatura de funcionamiento | — | 0C to +85C (C4 commercial grade) |
| Configuration Modes | — | JTAG, Passive Serial, Fast Passive Parallel |
| Nivel MSL | — | 3 (per JEDEC J-STD-020, FBGA package) |
| Hard Memory Controller | — | DDR2/DDR3 SDRAM (per Stratix III E family) |