EP3SL50F780I4 vs EP3SL50F780I4L Comparación
Comparación detallada lado a lado de EP3SL50F780I4 por Intel y EP3SL50F780I4L por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EP3SL50F780I4 - 50K LE Stratix III L FPGA, 780-BGA, Industrial | Intel
EP3SL50F780I4 ⚠ Última compraComparación de especificaciones
| Parámetro | EP3SL50F780I4 | EP3SL50F780I4L |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $580,00 | $695,09 |
| Series | Stratix III L | — |
| Manufacturer | Intel (formerly Altera) | — |
| Process Node | 40 nm TSMC | — |
| Logic Elements | 47,500 | 47,500 |
| Embedded Memory Bits | 2,184,192 | — |
| Embedded Memory Blocks | M20K blocks | — |
| DSP 18x18 Multipliers | 244 | — |
| User I/Os | 488 | — |
| PLLs | 8 | — |
| Global Clock Networks | 28 | — |
| Core Voltage | 0.9 V | 0.9 V |
| Temperatura de funcionamiento | -40C to +100C (Industrial) | -40C to +100C (Industrial) |
| Encapsulado | 780-BBGA, FCBGA | 780-BBGA, FCBGA (29 mm) |
| Tipo de montaje | Surface Mount | Surface Mount (BGA) |
| Speed Grade | I4 (fastest) | I4 |
| Configuration Method | Serial, parallel, or JTAG | — |
| Memory Interfaces | DDR3, QDRII+, RLDRAM II | — |
| Hard IP | PCIe Gen2 hard IP blocks | — |
| Estado RoHS | Compliant | — |
| Family | — | Stratix III L |
| Embedded Memory (bits) | — | 2,184,192 |
| User I/O Count | — | 488 |
| I/O Banks | — | 8 |
| Process Technology | — | 65 nm CMOS |
| Lead-Free / RoHS | — | Yes (L suffix) |
| Nivel MSL | — | [DATA_NEEDED: MSL moisture sensitivity level] |
| Configuration Memory | — | SRAM-based, volatile |
| Design Suite | — | Quartus II / Quartus Prime (Stratix III support) |
| Device Sub-Family | — | Low-Power (L) |
| Country of Origin | — | [DATA_NEEDED: COO not specified in source data] |