EP610ILC-10 vs EP610JI-30 Comparación
Comparación detallada lado a lado de EP610ILC-10 por Altera y EP610JI-30 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP610ILC-10 | EP610JI-30 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $7,20 | $9,40 |
| Device Family | Classic EPLD | — |
| Product Type | UV-Erasable / OTP PLD | — |
| Architecture | PAL-type with macrocells | — |
| Macrocells | 16 | 16 |
| Usable Gates | 300 | — |
| Product Terms | 160 | 160 |
| I/O Pins | 16 | 16 |
| Dedicated Inputs | 4 | 4 |
| Tensión de alimentación | 5 V (single supply) | 5 V (single supply) |
| Pin-to-Pin Delay (tPD) | 10 ns (grade -10) | — |
| Counter Frequency (fCNT) | 100 MHz | — |
| Logic Family Compatibility | TTL (5 V CMOS/TTL-compatible I/O) | — |
| Encapsulado | PLCC-28 (plastic J-lead chip carrier) | CQCC28 (windowed ceramic JLCC, J-bend) |
| Tipo de montaje | Surface Mount (PLCC socket or solder) | Surface Mount (JLCC) |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | -40C to +85C (industrial, per EP610 family suffix convention) |
| Estado RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status - vintage ceramic package, likely non-RoHS] |
| Family | — | Altera Classic EPLD (EP610) |
| Device Type | — | UV Erasable Programmable Logic Device (EPLD) |
| Propagation Delay (tpd) | — | 30 ns (max) |
| Pipelined Data Rate | — | Up to 100 MHz |
| External Clocks | — | 2 |
| Process Technology | — | CMOS |
| Package Code | — | JLCC-28 / CQCC28 |
| Erasure Method | — | Ultraviolet (UV) via top window |
| Programming | — | Altera Logic Programmer compatible |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |