EP610LC-35 vs EP610LC-15 Comparación
Comparación detallada lado a lado de EP610LC-35 por Altera y EP610LC-15 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP610LC-35 | EP610LC-15 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $9,95 | $4,65 |
| Family | Altera Classic EPLD | Altera Classic EPLD (EP610) |
| Device Series | EP610 | — |
| Macrocells | 16 | — |
| Usable Gates | 300 | — |
| Propagation Delay (tpd) | 37 ns | 15 ns |
| Supply Voltage (Vcc) | 5 V | 5 V (single supply) |
| Technology | CMOS EEPROM (one-time-programmable plastic) | — |
| Encapsulado | 28-pin PLCC (J-lead) | 28-pin PLCC (J-lead, plastic OTP) |
| Temperatura de funcionamiento | Commercial (0C to +70C) [DATA_NEEDED: exact grade letter] | 0C to +70C (commercial) [DATA_NEEDED: full temperature grade] |
| Speed Grade | -35 (slowest EP610) | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Programmable Pins | 24 input / 16 output (shared macrocells) | — |
| Estado RoHS | [DATA_NEEDED: rohs_status] | unknown |
| Lead-Free | [DATA_NEEDED: lead_free] | — |
| Nivel MSL | [DATA_NEEDED: msl_level] | [DATA_NEEDED: MSL rating] |
| Programming Tool | MAX+PLUS II development system | — |
| Product Type | — | Classic EPLD (Erasable Programmable Logic Device) |
| Logic Elements / Macrocells | — | 16 macrocells |
| Equivalent Gates | — | 300 gates |
| Counter Frequency (fmax) | — | 83.3 MHz |
| Pipelined Data Rate | — | up to 100 MHz |
| Process Technology | — | CMOS |
| Número de pines | — | 28 |
| Programming | — | OTP (one-time programmable) |