EP610PI-30 vs EP610PI-25 Comparación
Comparación detallada lado a lado de EP610PI-30 por Rochester Electronics y EP610PI-25 por Rochester Electronics. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Rochester Electronics
EP610PI-30 - 16-Macrocell Classic EPLD, 30ns, PDIP-24
EP610PI-30 ⚠ Última compraRochester Electronics
EP610PI-25 - 16-Macrocell Classic EPLD, 25ns DIP-24 | Rochester
EP610PI-25 ObsoleteComparación de especificaciones
| Parámetro | EP610PI-30 | EP610PI-25 |
|---|---|---|
| Marca | Rochester Electronics | Rochester Electronics |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $9,85 | $20,50 |
| Family | EP610 Classic EPLD | — |
| Logic Elements / Macrocells | 16 macrocells | — |
| Usable Gates | 300 gates | ~300 gates |
| Propagation Delay (tPD) | 30 ns (PI-30 speed grade) | 25 ns |
| Maximum Frequency (pipelined) | 100 MHz | — |
| Process Technology | CMOS EEPROM | CMOS, UV-erasable |
| Supply Voltage (VCC) | 5 V | 5 V nominal |
| Número de pines | 24 | — |
| Encapsulado | PDIP-24 (Plastic DIP) | 24-pin DIP (PI) ceramic through-hole |
| Number of Global Clocks | 2 | — |
| Number of Dedicated Inputs | 4 | 4 |
| Number of I/O Pins | 10 | — |
| Programming Technology | EEPROM (in-system, 100+ cycles) | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | — |
| Estado RoHS | Not Compliant (per distributor data) | — |
| ECCN | EAR99 | — |
| HTS Code | 8542.39.00.01 | — |
| Product Type | — | Erasable Programmable Logic Device (EPLD) |
| Series | — | Classic EP610 |
| Macrocells | — | 16 |
| Maximum Internal Frequency (fCNT) | — | [DATA_NEEDED: fCNT] |
| Number of Bidirectional I/O Pins | — | 16 |
| Rango de temperatura de funcionamiento | — | Industrial (I suffix): -40C to +85C |
| Programmable Flip-Flop Modes | — | D, T, JK, SR (per macrocell) |
| Global Clock Pins | — | 1 |
| Tipo de montaje | — | Through-Hole (DIP) |
| Lead-Free / RoHS | — | [DATA_NEEDED: RoHS] |
| Original Manufacturer | — | Altera (now Intel PSG; legacy stock from Rochester Electronics) |