EP910ILC-15 vs EP910IPC-15 Comparación
Comparación detallada lado a lado de EP910ILC-15 por Intel y EP910IPC-15 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP910ILC-15 | EP910IPC-15 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $16,10 | $7,95 |
| Family | Classic EPLD | — |
| Series | EP910 | — |
| Logic Gates | 450 | — |
| Macrocells | 24 | 24 |
| User I/O Pins | 36 | — |
| Propagation Delay (tPD) | 15 ns | 15 ns |
| Maximum Operating Frequency | 83.33 MHz | — |
| Tensión de alimentación | 5 V | — |
| Tipo de memoria | EPROM (UV-erasable) | — |
| Temperatura de funcionamiento | -40C to +85C (industrial) | 0C to +70C (commercial, IPC suffix) |
| Encapsulado | 44-pin PLCC (J-lead) | PDIP-40 (Plastic DIP, 40-pin) |
| Tipo de montaje | Surface Mount (SMT) | Through-Hole |
| Propagation Class | -15 speed grade | — |
| Storage Condition | Dry cabinet, humidity-controlled | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: rohs status not confirmed in verified data] |
| Device Family | — | Altera Classic EPLD (EP910 series) |
| Product Type | — | Erasable Programmable Logic Device (EPLD) |
| Architecture | — | PAL-type, CMOS |
| Dedicated Inputs | — | 12 |
| I/O Pins | — | 24 |
| Product Terms | — | 240 |
| External Clocks | — | 2 |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Process Technology | — | CMOS |
| Programming Method | — | JEDEC fuse map via Altera EPLD programmer |
| Recuento de pines | — | 40 |