EP910IPC-12 vs EP910ILC-25 Comparación
Comparación detallada lado a lado de EP910IPC-12 por Altera y EP910ILC-25 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP910IPC-12 | EP910ILC-25 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $14,20 | $9,95 |
| Family | Classic EPLD | EP910 Classic EPLD |
| Macrocells | 24 | 24 |
| Usable Gates | 450 | — |
| Maximum Operating Frequency (fMAX) | 76.9 MHz | — |
| Pin-to-Pin Propagation Delay (tPD) | 12 ns | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | — |
| Dedicated Inputs | 10 | — |
| I/O Pins | 24 | — |
| Encapsulado | 40-pin PDIP | 44-pin JLCC (windowed ceramic) |
| Tipo de montaje | Through Hole | Surface Mount |
| Technology | CMOS EPLD (UV-erasable or OTP) | CMOS EPROM (UV-erasable) |
| Temperatura de funcionamiento | -40C to +85C (industrial) | -40C to +85C (industrial) |
| Programming Toolchain | MAX+PLUS II | — |
| Logic Capacity | Equivalent to ~24 PAL16V8s | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | non_compliant (ceramic windowed package) |
| User I/O Pins | — | 36 |
| Propagation Delay (tPD) | — | 25 ns |
| Internal Frequency (fMAX) | — | [DATA_NEEDED: fMAX rating] |
| Logic Blocks | — | Sum-of-products AND/OR array |
| Configuration Memory | — | Non-volatile EPROM (windowed ceramic) |
| Tensión de alimentación | — | 5 V |
| Development Tool | — | Altera MAX+PLUS II (legacy) |
| Estado del ciclo de vida | — | Obsolete - last time buy was late 1990s |