EP910IPC-15 vs EP910ILC-15 Comparación
Comparación detallada lado a lado de EP910IPC-15 por Altera y EP910ILC-15 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP910IPC-15 | EP910ILC-15 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $7,95 | $16,10 |
| Device Family | Altera Classic EPLD (EP910 series) | — |
| Product Type | Erasable Programmable Logic Device (EPLD) | — |
| Architecture | PAL-type, CMOS | — |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 12 | — |
| I/O Pins | 24 | — |
| Product Terms | 240 | — |
| External Clocks | 2 | — |
| Propagation Delay (tPD) | 15 ns | 15 ns |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| Temperatura de funcionamiento | 0C to +70C (commercial, IPC suffix) | -40C to +85C (industrial) |
| Encapsulado | PDIP-40 (Plastic DIP, 40-pin) | 44-pin PLCC (J-lead) |
| Tipo de montaje | Through-Hole | Surface Mount (SMT) |
| Process Technology | CMOS | — |
| Programming Method | JEDEC fuse map via Altera EPLD programmer | — |
| Recuento de pines | 40 | — |
| Estado RoHS | [DATA_NEEDED: rohs status not confirmed in verified data] | [DATA_NEEDED: RoHS compliance status] |
| Family | — | Classic EPLD |
| Series | — | EP910 |
| Logic Gates | — | 450 |
| User I/O Pins | — | 36 |
| Maximum Operating Frequency | — | 83.33 MHz |
| Tensión de alimentación | — | 5 V |
| Tipo de memoria | — | EPROM (UV-erasable) |
| Propagation Class | — | -15 speed grade |
| Storage Condition | — | Dry cabinet, humidity-controlled |