EP910IPC-25 vs EP910ILI-25 Comparación
Comparación detallada lado a lado de EP910IPC-25 por Intel y EP910ILI-25 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP910IPC-25 | EP910ILI-25 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $10,40 | $7,25 |
| Family | Classic EPLD (EP910 series) | — |
| Manufacturer | Altera (now Intel) | — |
| Architecture | PAL-type EPLD, CMOS, UV/OTP | PAL-type with global interconnect bus |
| Usable Gates | 450 | — |
| Macrocells | 24 | 24 |
| Product Terms | 240 | 240 (maximum) |
| Propagation Delay (tPD) | 25 ns | 25 ns |
| Maximum Frequency (fMAX) | 40 MHz | — |
| Dedicated Inputs | 12 | 12 |
| Bidirectional I/O Lines | 24 | — |
| Total Inputs (max) | 36 | — |
| Total Outputs (max) | 24 | — |
| Supply Voltage (VCC) | 5 V | — |
| Temperatura de funcionamiento | 0C to +70C (commercial grade) | -40C to +85C (Industrial) |
| Encapsulado | 40-pin PDIP (PDIP-40) | PLCC-44 (windowed ceramic, J-lead) |
| Tipo de montaje | Through-Hole | — |
| Programming Method | EPROM cell (OTP / UV erasable) | UV-erasable (windowed), MAX+PLUS II programmer |
| Development Tool | MAX+PLUS II | — |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Series | — | EP910 (Classic EPLD) |
| I/O Pins | — | 24 |
| Technology | — | CMOS, EPROM |
| Operating Voltage | — | 5 V (4.75 V to 5.25 V) |
| Logic Test Circuitry | — | On-board JTAG-compatible test |
| Estado RoHS | — | Non-compliant (windowed ceramic package) |