EP910LC-30T vs EP910LC-40T Comparación
Comparación detallada lado a lado de EP910LC-30T por Altera y EP910LC-40T por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP910LC-30T | EP910LC-40T |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $7,10 | $10,40 |
| Part Number | EP910LC-30T | — |
| Manufacturer | Altera (Rochester Electronics) | — |
| Device Family | Classic EPLD | — |
| Macrocells | 24 | 24 |
| Usable Gates | 450 | — |
| Propagation Delay (tPD) | 30 ns | 40 ns |
| Maximum Operating Frequency | 33.3 MHz | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | — |
| Technology | CMOS, UV-erasable / OTP | CMOS, UV-erasable |
| User I/O Pins | 36 | 36 |
| Encapsulado | 44-pin PLCC (J-lead) | PLCC-44 (PQCC44) |
| Tipo de montaje | Surface Mount | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature] | -40 C to +85 C (commercial, per -LC suffix family) |
| Programmable Pins | Bidirectional, tri-state | — |
| Programming Interface | Altera MAX+PLUS II | — |
| Estado RoHS | unknown | [DATA_NEEDED: RoHS status - not stated in web data] |
| Lead-Free | unknown | — |
| Family | — | Altera Classic EPLD |
| Equivalent Gates | — | 450 gates |
| Logic Array Blocks | — | 4 Logic Expandable AND-OR arrays |
| Maximum Frequency (fMAX) | — | 25 MHz |
| Tensión de alimentación | — | 5 V (4.75 V to 5.25 V) |
| Programming | — | Altera MAX+PLUS II / APLUS tools |
| Erase/Reprogram Cycles | — | 100 (windowed UV-erase family) |
| Recuento de pines | — | 44 |
| Packaging Option | — | Tape and Reel (T suffix) |