EP910LC-35T vs EP910LC-40T Comparación
Comparación detallada lado a lado de EP910LC-35T por Altera y EP910LC-40T por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP910LC-35T | EP910LC-40T |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $28,90 | $10,40 |
| Family | Classic EPLD (EP910) | Altera Classic EPLD |
| Logic Capacity | 450 usable gates | — |
| Macrocells | 24 | 24 |
| Propagation Delay (tPD) | 35 ns | 40 ns |
| Maximum Operating Frequency | 28.6 MHz | — |
| Supply Voltage (VCC) | 5 V | — |
| User I/O Pins | 36 | 36 |
| Encapsulado | PLCC-44 (J-lead) | PLCC-44 (PQCC44) |
| Process Technology | CMOS (EPROM-based) | — |
| Temperatura de funcionamiento | 0C to +70C (commercial) | -40 C to +85 C (commercial, per -LC suffix family) |
| Erasure Method | UV-erasable window (ceramic package) / OTP (plastic) | — |
| Programming | Altera programming hardware + MAX+PLUS II | Altera MAX+PLUS II / APLUS tools |
| Tipo de montaje | Surface Mount (PLCC socket or solder) | — |
| Nivel MSL | MSL 3 (168 hours) | — |
| Estado RoHS | [DATA_NEEDED: RoHS status not in verified data] | [DATA_NEEDED: RoHS status - not stated in web data] |
| Equivalent Gates | — | 450 gates |
| Logic Array Blocks | — | 4 Logic Expandable AND-OR arrays |
| Maximum Frequency (fMAX) | — | 25 MHz |
| Tensión de alimentación | — | 5 V (4.75 V to 5.25 V) |
| Technology | — | CMOS, UV-erasable |
| Erase/Reprogram Cycles | — | 100 (windowed UV-erase family) |
| Recuento de pines | — | 44 |
| Packaging Option | — | Tape and Reel (T suffix) |