EP910LC-40T vs EP910LC-35T Comparación
Comparación detallada lado a lado de EP910LC-40T por Altera y EP910LC-35T por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP910LC-40T | EP910LC-35T |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $10,40 | $28,90 |
| Family | Altera Classic EPLD | Classic EPLD (EP910) |
| Equivalent Gates | 450 gates | — |
| Macrocells | 24 | 24 |
| Logic Array Blocks | 4 Logic Expandable AND-OR arrays | — |
| User I/O Pins | 36 | 36 |
| Propagation Delay (tPD) | 40 ns | 35 ns |
| Maximum Frequency (fMAX) | 25 MHz | — |
| Tensión de alimentación | 5 V (4.75 V to 5.25 V) | — |
| Technology | CMOS, UV-erasable | — |
| Encapsulado | PLCC-44 (PQCC44) | PLCC-44 (J-lead) |
| Temperatura de funcionamiento | -40 C to +85 C (commercial, per -LC suffix family) | 0C to +70C (commercial) |
| Programming | Altera MAX+PLUS II / APLUS tools | Altera programming hardware + MAX+PLUS II |
| Erase/Reprogram Cycles | 100 (windowed UV-erase family) | — |
| Recuento de pines | 44 | — |
| Packaging Option | Tape and Reel (T suffix) | — |
| Estado RoHS | [DATA_NEEDED: RoHS status - not stated in web data] | [DATA_NEEDED: RoHS status not in verified data] |
| Logic Capacity | — | 450 usable gates |
| Maximum Operating Frequency | — | 28.6 MHz |
| Supply Voltage (VCC) | — | 5 V |
| Process Technology | — | CMOS (EPROM-based) |
| Erasure Method | — | UV-erasable window (ceramic package) / OTP (plastic) |
| Tipo de montaje | — | Surface Mount (PLCC socket or solder) |
| Nivel MSL | — | MSL 3 (168 hours) |