EP910LI-35 vs EP910LC-25 Comparación
Comparación detallada lado a lado de EP910LI-35 por Altera y EP910LC-25 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP910LI-35 | EP910LC-25 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $25,80 | $2,20 |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Device Series | EP910 | — |
| Usable Gates | 900 | — |
| Macrocells | 24 | 24 |
| Maximum User I/O Pins | 38 | — |
| Propagation Delay (t_PD) | 35 ns | — |
| Maximum Counter Frequency (f_CNT) | 76.9 MHz | — |
| Tensión de alimentación | 5 V (4.75 V to 5.25 V) | — |
| Temperatura de funcionamiento | -40 °C to +85 °C (Industrial) | 0C to +70C (commercial) |
| Encapsulado | 44-pin PLCC (J-lead) | 28-pin PLCC (LC suffix) |
| Process Technology | CMOS EPROM | — |
| Programming Technology | EPROM (UV-erasable) | — |
| Erase/Program Cycles | ≥100 | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Lead Pitch | 1.27 mm | — |
| Logic Gates | — | [DATA_NEEDED: logic gate count] |
| Propagation Delay (tPD) | — | 25 ns |
| Dedicated Inputs | — | 16 |
| Technology | — | CMOS (EPROM-based) |
| Operating Voltage | — | [DATA_NEEDED: VCC range] |
| Programmable | — | Yes (EPROM, UV-erasable on windowed variants) |
| I/O Pins | — | [DATA_NEEDED: I/O count] |
| Estado RoHS | — | [DATA_NEEDED: RoHS status] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Maximum Frequency | — | [DATA_NEEDED: fMAX] |