EP910LI-35H vs EP910LI-35 Comparación
Comparación detallada lado a lado de EP910LI-35H por Intel y EP910LI-35 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP910LI-35H | EP910LI-35 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $9,85 | $25,80 |
| Family | Altera Classic EPLD (EP910) | Altera Classic EPLD |
| Logic Capacity | 900 usable gates | — |
| Macro Cells | 24 | — |
| Speed Grade (tPD) | 35 ns | — |
| Maximum Frequency | [DATA_NEEDED: fMAX] | — |
| Supply Voltage (VCC) | 5 V (±10%) | — |
| Technology | CMOS, UV-erasable EPROM cell | — |
| Encapsulado | 44-pin PLCC (J-lead) | 44-pin PLCC (J-lead) |
| Temperatura de funcionamiento | -40C to +85C (industrial) | -40 °C to +85 °C (Industrial) |
| Standby Current | [DATA_NEEDED: ICCSB] | — |
| Active Supply Current | [DATA_NEEDED: ICC] | — |
| Programmable Interconnect | Programmable Interconnect Array (PIA) | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Estado RoHS | unknown | — |
| Lead-Free Option (H suffix) | Yes (H suffix) | — |
| Device Series | — | EP910 |
| Usable Gates | — | 900 |
| Macrocells | — | 24 |
| Maximum User I/O Pins | — | 38 |
| Propagation Delay (t_PD) | — | 35 ns |
| Maximum Counter Frequency (f_CNT) | — | 76.9 MHz |
| Tensión de alimentación | — | 5 V (4.75 V to 5.25 V) |
| Process Technology | — | CMOS EPROM |
| Programming Technology | — | EPROM (UV-erasable) |
| Erase/Program Cycles | — | ≥100 |
| Lead Pitch | — | 1.27 mm |