EP910LI-40 vs EP910LI-35Y Comparación
Comparación detallada lado a lado de EP910LI-40 por Altera y EP910LI-35Y por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP910LI-40 | EP910LI-35Y |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $12,90 | $22,75 |
| Manufacturer | Altera (now Intel PSG) | — |
| Product Family | Classic EPLD - EP910 series | — |
| Device Type | Erasable Programmable Logic Device (EPLD) | — |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 12 | 36 |
| I/O Pins | 24 bidirectional | 24 |
| Maximum Logic Inputs | 36 | — |
| Product Terms | 240 | — |
| Propagation Delay (tPD) | 40 ns | — |
| Technology | Low-power CMOS (L-suffix) | CMOS EPROM/UV-erasable |
| Temperatura de funcionamiento | -40C to +85C (industrial, I-suffix) | — |
| Encapsulado | PLCC-44 (J-lead, windowed ceramic) | PLCC-44 (J-lead) |
| Tipo de montaje | Surface Mount (socket-compatible) | Surface Mount |
| Programmability | UV-erasable, JEDEC-standard algorithm | — |
| Estado RoHS | Non-compliant (windowed ceramic PLCC, legacy) | Compliant (Y suffix) |
| Lifecycle | Obsolete - replaced by MAX 7000 / MAX II CPLD family | — |
| Family | — | Altera Classic EPLD |
| Usable Gates | — | 450 |
| Propagation Delay (tpd) | — | 35 ns |
| Maximum Frequency (fmax) | — | [DATA_NEEDED: maximum toggle frequency in MHz] |
| Supply Voltage (VCC) | — | 5 V |
| Process Option | — | L (low-power CMOS) |
| Temperature Grade | — | Industrial (-40 °C to +85 °C) |
| Lead Finish | — | Lead-free (Y suffix, RoHS-compliant) |