EP910PI-35T vs EP910LC-35 Comparación
Comparación detallada lado a lado de EP910PI-35T por Altera y EP910LC-35 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP910PI-35T | EP910LC-35 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $11,15 | $18,75 |
| Family | Altera Classic EPLD | Classic (EP910) |
| Device Type | Erasable Programmable Logic Device (EPLD) | — |
| Macrocells | 24 | 24 |
| Usable Gates | 450 | 450 |
| Pin-to-Pin Logic Delay (tpd) | 35 ns | — |
| Counter Frequency (fCNT) | 28.6 MHz | — |
| Supply Voltage (VCC) | 5 V | 5 V |
| I/O Logic Compatibility | 100% TTL emulation | — |
| Process Technology | CMOS | — |
| Encapsulado | 40-pin PDIP (Plastic DIP) | PLCC-44 (J-lead, LC suffix) |
| Tipo de montaje | Through-Hole | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial) |
| Programming Method | UV-erasable, EPROM technology | — |
| On-board Test Circuitry | Yes (logic test mode for AC verification) | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance status] | Not applicable (legacy product) |
| Nivel MSL | [DATA_NEEDED: MSL level] | — |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Propagation Delay (tPD) | — | 35 ns |
| Maximum Toggle Frequency | — | 28.6 MHz |
| Technology | — | CMOS EPROM |
| Recuento de pines | — | 44 |
| Programmable Flip-Flops | — | Yes (per macrocell) |
| Output Enable Control | — | Per macrocell |
| Erasure Method | — | UV (windowed) or OTP (plastic) |