EPC144LC-20 vs EPC1441LI20 Comparación
Comparación detallada lado a lado de EPC144LC-20 por Altera y EPC1441LI20 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPC144LC-20 | EPC1441LI20 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | Memory ICs | Memory ICs |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $7,15 | $8,10 |
| Tipo de memoria | OTP EPROM (One-Time Programmable) | OTP Configuration PROM (PROM) |
| Tamaño de memoria | 440,800 bits (440 kb) | — |
| Configuration Interface | Altera serial daisy-chain | Altera 4-pin serial (DATA, DCLK, nCONFIG, nSTATUS) |
| Access Time (Speed Grade) | 20 ns | — |
| Supply Voltage (VCC) | [DATA_NEEDED: VCC min/max] | — |
| Supply Voltage (VPP) | [DATA_NEEDED: VPP programming voltage] | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | -40 C to +85 C (industrial) |
| Package Type | 20-pin PLCC (J-lead) | — |
| Package Dimensions | 9 x 9 mm | — |
| Tipo de montaje | Surface Mount | — |
| Compatible FPGA Families | FLEX 10K, FLEX 8000, ACEX 1K | — |
| Programming Method | Altera Logic Programmer / JTAG | One-Time-Programmable via Altera programming hardware |
| Process Technology | CMOS | — |
| Nivel MSL | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL rating] |
| Estado RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free status] |
| Daisy-Chain Support | Yes (multiple PROMs cascadable) | — |
| Manufacturer | Altera (now Intel FPGA) | — |
| Density | — | 441 kbits (440,800 bits) |
| Number of Words | — | 440,800 |
| Bits per Word | — | 1 bit |
| Supported FPGA Families | — | ACEX, APEX 20K / 20KC / 20KE, FLEX 10KE, FLEX 10KA, Mercury |
| Tensión de alimentación | — | 3.3 V |
| Encapsulado | — | 20-pin PLCC (J-lead, 9x9 mm) |
| Pin Pitch | — | 1.27 mm |
| Configuration Time | — | Depends on FPGA bitstream length and DCLK frequency |