EPC16UC88N vs EPC164C88N Comparación
Comparación detallada lado a lado de EPC16UC88N por Altera y EPC164C88N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPC16UC88N | EPC164C88N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | Memory ICs |
| Estado del ciclo de vida | NRND | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $9,75 | $7,20 |
| Tamaño de memoria | 16 Mbit (16,777,216 bits) | — |
| Programmable Type | In System Programmable | — |
| Supply Voltage (Vcc) | 3.0 V to 3.6 V | — |
| Configuration Modes | Passive Serial (PS), Passive Parallel Synchronous (PPS), Passive Parallel Asynchronous (PPA), JTAG | — |
| On-Chip Decompression | Yes (Altera proprietary) | — |
| Encapsulado / Carcasa | 88-UBGA (11x8 mm) / 88-LFBGA | — |
| Recuento de pines | 88 | — |
| Temperatura de funcionamiento | 0 °C to +70 °C | — |
| Bus-Hold on Data Lines | Yes | — |
| Standby Mode | Yes (reduced power consumption) | — |
| JTAG Boundary Scan | Yes (IEEE 1149.1) | — |
| Programming Interface | JTAG (in-system) / Serial (in-system) | IEEE 1149.1 JTAG (in-system programmable) |
| On-Chip Oscillator | Yes (internal configuration clock) | — |
| Lead-Free / RoHS | Lead-Free (per datasheet) | — |
| Tipo de montaje | Surface Mount | Surface Mount (BGA) |
| Packaging | Tray | — |
| Función | — | In-system programmable configuration PROM for SRAM-based FPGAs |
| Memory Density | — | 16 Mbit |
| Configuration Interface | — | Altera passive serial / fast passive parallel |
| Operating Voltage (VCCINT) | — | 3.3 V typical |
| Supported FPGA Voltages | — | 1.8 V, 2.5 V, 3.3 V, 5.0 V |
| Encapsulado | — | 88-pin UBGA (Ultra FineLine BGA) 11x8 mm |
| Rango de temperatura de funcionamiento | — | [DATA_NEEDED: industrial or commercial grade] |
| Nivel MSL | — | [DATA_NEEDED: MSL classification] |
| Estado RoHS | — | [DATA_NEEDED: RoHS compliance] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| REACH Status | — | [DATA_NEEDED: REACH compliance] |
| Compatible FPGA Families | — | Cyclone, Cyclone II, Cyclone III, Stratix, Stratix II, Stratix III, Stratix GX, Stratix II GX, HardCopy II |
| Configuration Mode | — | Passive Serial (PS), Fast Passive Parallel (FPP) |
| Reprogrammability | — | Yes (in-system via JTAG) |