EPC22C20N vs EPC2LC20N Comparación
Comparación detallada lado a lado de EPC22C20N por Altera y EPC2LC20N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPC22C20N | EPC2LC20N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | Memory ICs | Memory ICs |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $11,40 | $7,40 |
| Manufacturer | Intel (formerly Altera) | — |
| Device Type | Configuration PROM for SRAM-based LUT FPGAs | — |
| Target FPGA Family | FLEX 10K, FLEX 6000, APEX 20K series | — |
| Configuration Interface | Serial (DCLK / DATA0 / nCONFIG / nSTATUS / CONF_DONE) | — |
| Programming Interface | IEEE 1149.1 JTAG (in-system programmable) | — |
| Tensión de alimentación | 3.3 V or 5 V | — |
| Encapsulado | 20-pin PLCC (J-lead) | 20-pin PLCC (J-Lead, 9x9 mm) |
| Package Marking Code | EPC22C20N | — |
| Recuento de pines | 20 | — |
| Tipo de montaje | Surface Mount / Socket | Surface Mount |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Bitstream Capacity | [DATA_NEEDED: bitstream capacity in bits] | — |
| Configuration Time | [DATA_NEEDED: typical configuration time] | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead-Free Status | [DATA_NEEDED: lead-free status] | — |
| Estado del ciclo de vida | Obsolete (last-time-buy from Altera announced for legacy configuration devices) | — |
| Función | — | In-System Programmable Configuration PROM for SRAM-based FPGAs |
| Tamaño de memoria | — | 1.6 Mbit |
| Tipo de memoria | — | Flash |
| Programmable Type | — | In System Programmable (ISP) |
| Supply Voltage VCCINT | — | 3.0 V to 3.6 V |
| Supply Voltage VCCIO | — | 4.75 V to 5.25 V |
| Configuration Clock Frequency | — | 8 MHz (max) |
| Interfaz | — | Serial (DATA0, DCLK, nCONFIG, nSTATUS, CONF_DONE) |
| JTAG Support | — | IEEE 1149.1 / IEEE 1532 compliant |
| Packaging | — | Tube |
| Supported FPGA Families | — | Altera APEX, Cyclone, Stratix, ACEX, MAX 7000 |