EPC2L20U-HAF480119C vs EPC2L20 Comparación
Comparación detallada lado a lado de EPC2L20U-HAF480119C por Intel y EPC2L20 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EPC2L20U-HAF480119C - FPGA Config Device, SRAM LUT | Intel
EPC2L20U-HAF480119C ⚠ Última compraComparación de especificaciones
| Parámetro | EPC2L20U-HAF480119C | EPC2L20 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | Memory ICs | Memory ICs |
| Estado del ciclo de vida | Última compra | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $10,75 | $25,80 |
| Tipo de memoria | Configuration PROM (non-volatile) | Configuration PROM (non-volatile) |
| Tamaño de memoria | 1.6 Mb | 1.6 Mbit |
| Target Device | SRAM-based LUT FPGAs (Cyclone, Stratix, APEX families) | — |
| Core Supply Voltage | 3.3 V | — |
| I/O Tolerance | 5 V tolerant | — |
| Configuration Modes | Serial (1-bit), Parallel (8-bit FPP), JTAG | — |
| JTAG Support | Yes (IEEE 1149.1 boundary-scan) | — |
| Programmability | In-system programmable via JTAG | In-system programmable via JTAG |
| Cascade Support | Yes (multi-PROM chains for larger FPGAs) | Yes - multi-device daisy chain |
| Configuration Clock Range | 10 MHz to 40 MHz | — |
| Bitstream Compression Support | Yes (Cyclone/Stratix compressed bitstreams) | — |
| Encapsulado | PLCC-20 | 20-pin PLCC (J-lead) |
| Tipo de montaje | Surface Mount / Socketed | Surface Mount (PLCC socket compatible) |
| Rango de temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | RoHS Compliant (per IC Components listing) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Organización de memoria | — | 8-bit byte |
| Interfaz | — | Serial FPGA configuration + JTAG (IEEE 1149.1 / IEEE 1532) |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 3.3 V or 5.0 V (VCCSEL selectable) |
| Boundary Scan | — | JTAG IEEE 1149.1 BST |
| Temperatura de funcionamiento | — | [DATA_NEEDED: operating temperature range] |
| Nivel MSL | — | [DATA_NEEDED: MSL rating] |
| Process Technology | — | Low-power CMOS |
| Target FPGAs | — | APEX II, APEX 20K, Mercury, ACEX 1K, Cyclone, Stratix |