EPC2LC20-V vs EPC2LI20N Comparación
Comparación detallada lado a lado de EPC2LC20-V por Altera y EPC2LI20N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPC2LC20-V | EPC2LI20N |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | Memory ICs | Memory ICs |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $9,45 | $5,10 |
| Tipo de memoria | Configuration PROM (Flash-based, in-system programmable) | Non-volatile configuration PROM (Flash) |
| Memory Density | 1.6 Mbit | — |
| Configuration Interface | Serial (Altera FPP/PS modes via DCLK/nSTATUS/CONF_DONE) | — |
| Maximum Configuration Clock | 10 MHz | — |
| Supply Voltage VCC | 3.3 V | — |
| I/O Tolerance | 5 V tolerant on configuration pins | — |
| In-System Programming | Yes, via IEEE 1149.1 JTAG (TMS/TCK/TDI/TDO) | — |
| Cascade Support | Yes, daisy-chainable for >1.6 Mbit designs | — |
| Operating Temperature Range (V suffix) | 0 °C to +70 °C (commercial) | — |
| Package Type | 20-pin PLCC (JEDEC MS-018) | — |
| Package Dimensions | 9 x 9 mm body, 1.27 mm pitch | — |
| Tipo de montaje | Surface Mount (PLCC socket compatible) | Surface Mount |
| Supported FPGA Families | APEX 20K, ACEX 1K, FLEX 10K, FLEX 6000, MAX 9000 | — |
| Estado RoHS | Compliant (per distributor listings) | [DATA_NEEDED: RoHS status] |
| Lead-Free | Yes | — |
| Tamaño de memoria | — | 1.6 Mbit |
| Programmable Type | — | In System Programmable (ISP via JTAG) |
| Configuration Mode | — | Serial |
| Maximum Configuration Frequency | — | 10 MHz |
| Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V |
| Supply Voltage (VCCIO) | — | 4.5 V to 5.5 V |
| Encapsulado / Carcasa | — | 20-PLCC (J-Lead), 9x9 mm |
| Packaging | — | Tube |
| Temperatura de funcionamiento | — | [DATA_NEEDED: operating temperature range] |
| Supported FPGA Series | — | ACEX 1K, APEX II, Cyclone, Stratix II |
| JTAG Interface | — | IEEE 1149.1 boundary scan (TCK/TDI/TMS/TDO) |
| Configuration Pins | — | nCS, DCLK, DATA, nCONFIG, nSTATUS, CONF_DONE |