EPC2LC21N vs EPC1LI20N Comparación
Comparación detallada lado a lado de EPC2LC21N por Altera y EPC1LI20N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPC2LC21N | EPC1LI20N |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | Memory ICs | Memory ICs |
| Estado del ciclo de vida | Obsolete | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $10,95 | $7,80 |
| Tipo de memoria | Configuration PROM (EPROM/EEPROM-based) | OTP Configuration PROM (One-Time Programmable) |
| Tamaño de memoria | 1.6 Mbit | 1 Mbit (1,048,576 bits) |
| Tensión de alimentación | 3.3 V | — |
| Interfaz | Serial (Altera FPP/PS configuration) | — |
| Programmability | In-system programmable via JTAG (ISP) | — |
| Configuration Method | Serial data stream to FPGA DCLK/DATA | — |
| Encapsulado | 20-pin PLCC (9x9 mm) | — |
| Tipo de montaje | Surface Mount (PLCC socket compatible) | Surface Mount (PLCC socket or solder) |
| Temperatura de funcionamiento | -40C to +85C (industrial) | -40C to +85C (Industrial) |
| JTAG Support | Yes (IEEE 1149.1 boundary-scan) | — |
| Endurance (ISP writes) | [DATA_NEEDED: ISP write endurance cycles] | — |
| Data Retention | [DATA_NEEDED: data retention years] | — |
| Estado RoHS | Compliant | Compliant |
| Lead-Free | Yes | — |
| Target FPGAs | Altera APEX, ACEX, FLEX, Cyclone, MAX series | — |
| Tipo de interfaz | — | Serial (Altera proprietary configuration protocol) |
| Encapsulado / Carcasa | — | 20-LCC (J-Lead), PLCC-20 |
| Package Dimensions | — | 9 mm x 9 mm (PLCC-20 J-lead) |
| Supply Voltage - VCCINT | — | 3.0 V to 3.6 V |
| Supply Voltage - VCCIO | — | 4.5 V to 5.5 V |
| JTAG / Boundary Scan | — | IEEE 1149.1 compliant (for programming) |
| Programmable Compression | — | Yes (reduces bitstream 30-55%) |
| Packaging | — | Tube |
| Lead Finish | — | Matte Sn (per JEDEC J-STD-020) |
| Target FPGA Families | — | Cyclone, FLEX 10K, APEX, ACEX 1K (LUT-based) |