EPC2LC21N vs EPC2LC20N Comparación
Comparación detallada lado a lado de EPC2LC21N por Altera y EPC2LC20N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPC2LC21N | EPC2LC20N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | Memory ICs | Memory ICs |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $10,95 | $7,40 |
| Tipo de memoria | Configuration PROM (EPROM/EEPROM-based) | Flash |
| Tamaño de memoria | 1.6 Mbit | 1.6 Mbit |
| Tensión de alimentación | 3.3 V | — |
| Interfaz | Serial (Altera FPP/PS configuration) | Serial (DATA0, DCLK, nCONFIG, nSTATUS, CONF_DONE) |
| Programmability | In-system programmable via JTAG (ISP) | — |
| Configuration Method | Serial data stream to FPGA DCLK/DATA | — |
| Encapsulado | 20-pin PLCC (9x9 mm) | 20-pin PLCC (J-Lead, 9x9 mm) |
| Tipo de montaje | Surface Mount (PLCC socket compatible) | Surface Mount |
| Temperatura de funcionamiento | -40C to +85C (industrial) | [DATA_NEEDED: operating temperature range] |
| JTAG Support | Yes (IEEE 1149.1 boundary-scan) | IEEE 1149.1 / IEEE 1532 compliant |
| Endurance (ISP writes) | [DATA_NEEDED: ISP write endurance cycles] | — |
| Data Retention | [DATA_NEEDED: data retention years] | — |
| Estado RoHS | Compliant | [DATA_NEEDED: RoHS status] |
| Lead-Free | Yes | — |
| Target FPGAs | Altera APEX, ACEX, FLEX, Cyclone, MAX series | — |
| Función | — | In-System Programmable Configuration PROM for SRAM-based FPGAs |
| Programmable Type | — | In System Programmable (ISP) |
| Supply Voltage VCCINT | — | 3.0 V to 3.6 V |
| Supply Voltage VCCIO | — | 4.75 V to 5.25 V |
| Configuration Clock Frequency | — | 8 MHz (max) |
| Packaging | — | Tube |
| Supported FPGA Families | — | Altera APEX, Cyclone, Stratix, ACEX, MAX 7000 |