EPC2T32U-CAF48 vs EPC2LI20N Comparación
Comparación detallada lado a lado de EPC2T32U-CAF48 por Altera y EPC2LI20N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EPC2T32U-CAF48 - Altera/Intel 2Mb Config Device, 8MHz, 48-QFN | XAIPART
EPC2T32U-CAF48 ⚠ Última compra
Comparación de especificaciones
| Parámetro | EPC2T32U-CAF48 | EPC2LI20N |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | Memory ICs | Memory ICs |
| Estado del ciclo de vida | Última compra | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $17,60 | $5,10 |
| Tipo de memoria | Non-volatile flash configuration memory | Non-volatile configuration PROM (Flash) |
| Memory Density | 2 Mb (2097152 bits) | — |
| Configuration Interface | Altera FPP (8-bit) / PS (4-wire) / AS (serial) | — |
| Maximum Configuration Clock (DCLK) | 8 MHz | — |
| Supply Voltage (VCC) | 3.3 V (typical) | — |
| I/O Tolerance | 5 V tolerant | — |
| Program/Erase Endurance | 10,000 cycles per sector minimum | — |
| Data Retention | 20 years minimum | — |
| Programming Interface | IEEE 1149.1 (JTAG) / IEEE 1532 | — |
| Encapsulado | 48-pin QFN (CAF suffix) | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Temperatura de funcionamiento | -40 C to +85 C (industrial grade, "U") | [DATA_NEEDED: operating temperature range] |
| Nivel MSL | [DATA_NEEDED: MSL level] | — |
| Lead-Free Finish | Yes (CAF suffix indicates lead-free) | — |
| Estado RoHS | Compliant | [DATA_NEEDED: RoHS status] |
| Supported FPGA Families | Cyclone, Cyclone II, Stratix, APEX 20K, ACEX 1K, Mercury, Excalibur | — |
| Tamaño de memoria | — | 1.6 Mbit |
| Programmable Type | — | In System Programmable (ISP via JTAG) |
| Configuration Mode | — | Serial |
| Maximum Configuration Frequency | — | 10 MHz |
| Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V |
| Supply Voltage (VCCIO) | — | 4.5 V to 5.5 V |
| Encapsulado / Carcasa | — | 20-PLCC (J-Lead), 9x9 mm |
| Packaging | — | Tube |
| Supported FPGA Series | — | ACEX 1K, APEX II, Cyclone, Stratix II |
| JTAG Interface | — | IEEE 1149.1 boundary scan (TCK/TDI/TMS/TDO) |
| Configuration Pins | — | nCS, DCLK, DATA, nCONFIG, nSTATUS, CONF_DONE |