EPC81500RC304-3 vs EPC1441TC32 Comparación
Comparación detallada lado a lado de EPC81500RC304-3 por Altera y EPC1441TC32 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EPC81500RC304-3 - Enhanced Configuration Device for SRAM FPGAs | Altera
EPC81500RC304-3 Obsolete
Comparación de especificaciones
| Parámetro | EPC81500RC304-3 | EPC1441TC32 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | Memory ICs |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $23,90 | $9,75 |
| Device Type | Enhanced Configuration Device (Flash-based FPGA configuration memory) | — |
| Target FPGA Families | Altera FLEX 8000, FLEX 10K, ACEX 1K, APEX series SRAM-based LUT FPGAs | — |
| Configuration Memory Size | 8 Mbit | — |
| Interface Modes | Parallel-byte and serial bitstream modes | — |
| Programming Interface | JTAG (IEEE 1149.1) and byte-wide parallel | — |
| Supply Voltage VCCINT | 3.3 V | — |
| I/O Voltage VCCIO | 3.3 V or 5.0 V tolerant | — |
| Rango de temperatura de funcionamiento | 0 C to +70 C (commercial) | — |
| Encapsulado | 304-pin PQFP (RC304) | 32-TQFP (7 mm x 7 mm) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Recuento de pines | 304 | — |
| Configuration Clock | DCLK generated internally or externally to target FPGA | — |
| Multi-Device Support | Yes - daisy-chain configuration of multiple FPGAs | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status - datasheet not yet verified] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Tipo de memoria | — | OTP Configuration PROM (flash-based) |
| Tamaño de memoria | — | 440 Kbit (55000 byte) |
| Programmability | — | One-Time Programmable (OTP) |
| Tensión de alimentación | — | 3.3 V / 5.0 V |
| Internal Oscillator | — | 16.7 MHz |
| In-System Programming | — | IEEE 1149.1 JTAG, 3.3 V / 5.0 V |
| Supported FPGA Families | — | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX |
| Configuration Modes | — | Passive Serial, Fast Passive Parallel, Passive Parallel Asynchronous |
| Daisy Chain Support | — | Yes |
| Temperatura de funcionamiento | — | Commercial (0C to +70C) |
| Terminal Form | — | Gull Wing |
| Terminal Pitch | — | 0.8 mm |
| Nivel MSL | — | 3 (168 hours) |