EPC8QI100N vs EPC8Q100 Comparación
Comparación detallada lado a lado de EPC8QI100N por Altera y EPC8Q100 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPC8QI100N | EPC8Q100 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | EEPROM | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $16,90 | $10,85 |
| Manufacturer | Altera (Intel) | — |
| Part Family | EPC8 (Enhanced Configuration) | — |
| Device Type | Configuration PROM for SRAM-based FPGAs | — |
| Tamaño de memoria | 8 Mbit (8,388,608 bits) | — |
| Programmable Type | In System Programmable (Flash) | — |
| Configuration Interface | Altera serial (4-wire: DATA, DCLK, nCS, nINIT_CONF) | Altera EPC serial (DATA, DCLK, nCS, nINIT_CONF, nSTATUS, DONE) |
| Maximum Configuration Clock | 50 MHz | — |
| On-Chip Decompression | Yes (Altera compression algorithm) | — |
| Supply Voltage (VCC) | 3.0 V to 3.6 V | — |
| Temperatura de funcionamiento | -40 °C to +85 °C (Industrial) | — |
| Encapsulado | 100-PQFP / 100-BQFP (20 x 14 mm) | 100-pin PQFP (20 x 14 mm) |
| Recuento de pines | 100 | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Lead-Free / RoHS | Yes (per distributor listings) | [DATA_NEEDED: status] |
| JTAG (IEEE 1149.1) ISP | Supported | — |
| Multi-Device Daisy-Chain | Supported | — |
| Target FPGA Families | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX | — |
| Packaging | Tray | — |
| Memory Density | — | 8 Mbit (8,388,608 bits) |
| Tipo de memoria | — | NOR Flash, One-Time-Programmable (OTP) via JTAG |
| Supply Voltage VCC | — | 5.0 V (3.3 V core generated on-chip) |
| Internal Core Voltage | — | 3.3 V (on-chip LDO) |
| Maximum EPC Clock | — | 33 MHz |
| Programmability | — | In-system via IEEE 1149.1 JTAG |
| FPGA Compatibility | — | APEX 20K, APEX II, Cyclone, Cyclone II, Stratix, Stratix GX |
| Configuration Mode Support | — | FPP, PS, AS, JTAG (FPGA-dependent) |
| Program/Erase Endurance | — | [DATA_NEEDED: cycle count] |
| Data Retention | — | [DATA_NEEDED: minimum years] |
| Rango de temperatura de funcionamiento | — | 0 C to +70 C (commercial) |
| Storage Temperature Range | — | [DATA_NEEDED: range] |
| Nivel MSL | — | [DATA_NEEDED: level] |