EPF10K130EFC484-2N vs EPF10K100EFC484-2 Comparación
Comparación detallada lado a lado de EPF10K130EFC484-2N por Altera y EPF10K100EFC484-2 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPF10K130EFC484-2N | EPF10K100EFC484-2 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $799,00 | $185,40 |
| Product Type | Field Programmable Gate Array (FPGA) | — |
| Series | FLEX-10KE | FLEX-10KE |
| Gate Count | 130,000 gates | — |
| Logic Cells | 6,656 cells | — |
| Logic Family | CMOS | — |
| Process Technology | 0.22 µm | 0.22 um SRAM CMOS |
| Listed Maximum Frequency | 333.33 MHz | — |
| Propagation Delay | 0.6000 ns | — |
| User I/Os | 369 I/Os | — |
| Alternative I/O Count Listing | 274 I/Os | — |
| Embedded Memory | 65,536 bits | — |
| Logic Array Blocks | 832 LABs | — |
| Tensión de alimentación | 2.5 V nominal | — |
| Verified Supply-Voltage Range | 2.375 V to 2.625 V | — |
| Alternate Supply Listing | 3.3 V | — |
| Temperatura de funcionamiento | 0 °C to 70 °C | 0C to +70C (commercial) |
| Encapsulado | 484-ball FBGA, 23 mm × 23 mm | — |
| Package Pin Count | 356 pins | — |
| Ball Pitch | 1 mm | — |
| RoHS Compliance | unknown | — |
| REACH Compliance | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Lead-Free Status | unknown | — |
| Halogen-Free Status | unknown | — |
| Manufacturer | — | Altera (Intel) |
| Family | — | FLEX-10KE |
| Logic Elements / Cells | — | 49,992 |
| Logic Array Blocks (LABs) | — | 624 |
| Total RAM Bits | — | [DATA_NEEDED: total embedded memory bits] |
| Number of I/O | — | 338 |
| Supply Voltage (Core) | — | 2.375 V to 2.625 V |
| Tipo de montaje | — | Surface Mount |
| Encapsulado / Carcasa | — | 484-BBGA |
| Supplier Device Package | — | 484-FBGA (23x23 mm) |
| Speed Grade | — | -2 |
| Configuration Method | — | SRAM - serial JTAG or EPC configuration device |
| Programmable I/O Standards | — | LVTTL, LVCMOS, PCI, SSTL |
| Estado RoHS | — | [DATA_NEEDED: RoHS compliance] |